A temperature characterization of (Si-FinFET) based on channel oxide thickness

This paper presents the temperature-gate oxide thickness characteristics of a fin field-effect transistor (FinFET) and discusses the possibility of using such a transistor as a temperature nano-sensor. The investigation of channel oxide thickness–based temperature characteristics is useful to optimized electrical and temperature characteristics of FinFET. Current–voltage characteristics with different temperatures and gate oxide thickness values (Tox = 1, 2, 3, 4, and 5 nm) are initially simulated, and the diode mode connection is considered to measure FinFET’s temperature sensitivity. Finding the best temperature sensitivity of FinFET is based on the largest change in current (∆I) within a working voltage range of 0–5 V. According to the results, the temperature sensitivity of FinFET increases linearly with oxide thickness within the range of 1–5 nm, furthermore, the threshold voltage and drain-induced barrier lowering increase with increasing oxide thickness. Also, the subthreshold swing (SS) is close to the ideal value at the minimum oxide thickness (1 nm) then increases and diverges with increasing oxide thickness. So, the best oxide thickness (nearest SS value to the ideal one) of FinFET under the conditions described in this research is 1 nm

A temperature characterization of (Si-FinFET) based on channel oxide thickness

This paper presents the temperature-gate oxide thickness characteristics of a fin field-effect transistor (FinFET) and discusses the possibility of using such a transistor as a temperature nano-sensor. The investigation of channel oxide thickness–based temperature characteristics is useful to optimized electrical and temperature characteristics of FinFET. Current–voltage characteristics with different temperatures and gate oxide thickness values (Tox=1, 2, 3, 4, and 5 nm) are initially simulated, and the diode mode connection is considered to measure FinFET’s temperature sensitivity. Finding the best temperature sensitivity of FinFET is based on the largest change in current (ΔI) within a working voltage range of 0–5 V. According to the results, the temperature sensitivity of FinFET increases linearly with oxide thickness within the range of 1–5 nm, furthermore, the threshold voltage and drain-induced barrier lowering increase with increasing oxide thickness. Also, the subthreshold swing (SS) is close to the ideal value at the minimum oxide thickness (1 nm) then increases and diverges with increasing oxide thickness. So, the best oxide thickness (nearest SS value to the ideal one) of FinFET under the conditions described in this research is 1 nm

Temperature characteristics of FinFET based on channel fin width and working voltage

This paper shows the temperature sensitivity of FinFET and the possibility of using FinFET as a temperature Nano sensor based on Fin width of transistor. The multi-gate field effect transistor (MuGFET) simulation tool is used to examine the temperature effect on FinFET characteristics. Current-voltage characteristics with various temperatures and channel Fin width (WF= 5,10,20,40 and 80 nm) are at first simulated, the diode mode connection has been used in this study. The best temperature sensitivity of the FinFET is has been considered under the biggest ∆I at the working voltage VDD with range of 0–5 V. According to the results, the temperature sensitivity increased linearly with all the range of channel Fin width (5-80 nm), also, the lower gate Fin width (WF=5nm) with higher sensitivity can achieved with lower working voltage (VDD=1.25 V)

Optimal channel dimensions and temperature characteristics of SI-FinFET transistor

As metal oxide semiconductor field effect transistor (MOSFET) technology approaches its downscaling limits, many novel structures of FET have been explored extensively. One of the relatively new types of FET is FinFET. The performance of electronic devices, which may correspond to a wide array of recent applications, likely depend on the nano-dimensional characteristics of such devices. The chip generation of these powerful electronic devices with ultra-small transistors may increase in reliability when new findings from future research are consolidated. However, nano-dimensional FET designs and structures are still considered as novel technologies, thereby necessitating further study and improvement. Further innovations are needed despite the limitations in MOSFET science. Transistor-based temperature sensors are designed based on the temperature characteristics of current-voltage curves of FinFET transistors. This study aims to design channel dimensions of Si-FinFET for best performance based on electrical and temperature characteristics. The study investigates the temperature characteristics (sensitivity and stability) of Si-FinFET based on optimal channel dimensions, such as length (L), width (W)), oxide thickness (TOX) and operating voltage (VDD). This study focuses on simulating and analysing the effects of the operating temperature of Si-FinFET on its electrical characteristics as limitation factors, namely, threshold voltage (VT), subthreshold swing (SS), and drain-induced barrier lowering (DIBL). A multi-gate field effect transistor (MuGFET) simulation tool is used to investigate the temperature and electrical characteristics of FinFET. Current-voltage characteristics with different temperatures (T = 250, 275, 300, 325, 350, 375 and 400 K) and gate length (Lg = 25, 45, 65, 85 and 105 nm), gate width (Wg = 5, 10, 20, 40 and 80 nm) and oxide thickness (TOX = 1, 2, 3, 4 and 5 nm) are initially simulated. Then, the metal oxide semiconductor diode mode connection to measure FinFET temperature sensitivity is considered. Thus, the perfect channel length for the FinFET under the conditions considered in this thesis is 65 nm to obtain acceptable temperature sensitivity at the operating voltage range of 0–5 V. Furthermore, temperature sensitivity of the FinFET increased with channel width at the range of 5–80 nm. The best increments for the current (ΔI) in relation to temperature can be achieved by increasing TOX to 5 nm, beyond which the values become stable regardless of the thickness. We can infer that the optimal Wg values are 5, 10 and 20 nm, which are consistent and may be considered as perfect values. The best TOX in this study is 1 nm

Temperature sensitivity based on channel length of FinFET transistor

This paper presents the temperature sensitivity of the gate length-based fin field effect transistor (FinFET) and the possibility of using such a transistor as a nano-temperature sensor. The multi-gate field effect transistor (MuGFET) simulation tool is used to investigate the temperature characteristics of FinFET. Current–voltage characteristics with different temperatures and gate lengths (Lg = 25, 45, 65, 85 and 105 nm) are initially simulated, then the metal oxide semiconductor diode mode connection to measure FinFET temperature sensitivity is considered. The best temperature sensitivity of the FinFET is observed on the basis of the largest ∆I at the working voltage VDD range of 0–5 V. Furthermore, temperature sensitivity of the FinFET increased linearly with channel length at the range of 25–105 nm